1. Field of the Invention
The present invention relates to a liquid crystal display device and method of driving the same, and more particularly, to a liquid crystal display device and method of driving the same for removing the effect of residual charge when turning on the liquid crystal display panel.
2. Description of the Related Art
In general, a liquid crystal display device is a display device for generating image information to pixels arranged in a matrix form, and adjusting the optical transmittance of the pixels to display desired images. Accordingly, the liquid crystal display device may include a liquid crystal display panel in which pixels (i.e., the minimum units for displaying an image) are arranged in an active matrix form between the pixel electrode and the common electrode, and a driving unit for driving the liquid crystal display panel. Furthermore, the liquid crystal display device may include a backlight unit for supplying light to the liquid crystal display device because it is unable to spontaneously emit light.
FIG. 1 is a schematic block diagram illustrating a liquid crystal display device. As illustrated in FIG. 1, a liquid crystal display device may include a liquid crystal display panel 10 for displaying an image, a power supply unit 50, a timing controller 40 for outputting a gate control signal and a data control signal controlling the liquid crystal display panel 10 based on an external signal, a gate driving unit 20 for outputting a gate driving voltage to the liquid crystal display panel 10, a data driving unit 30 for outputting a data voltage to the liquid crystal display panel 10, and a discharge circuit 60 for discharging the residual charge of the pixel.
For the liquid crystal display panel 10, a plurality of pixels are disposed in a matrix form by gate lines (GLs) formed in one direction on the substrate, and data lines (DLs) intersecting with the gate lines (GLs). Furthermore, a thin-film transistor (TFT), which is a switching element connected to the liquid crystal capacitor (Clc) and storage capacitor (Cst), is provided for each of the pixels.
The power supply unit 50 generates a plurality of driving voltages and a common voltage (Vcom) for driving the timing controller 40, gate driving unit 20, data driving unit 30, and liquid crystal display panel 10. Particularly, the power voltage (VCC), gate-on voltage (VGH) and gate-off voltage (VGL) are supplied to the gate driving unit 20, and the power voltage (VCC), driving voltage (VDD) and gamma voltage (GMA) to the data driving unit 30, and the power voltage (VCC) and gate-on voltage (VGH) to the discharge circuit 60.
The timing controller 40 generates a gate control signal and a data control signal based on an input external signal to output them to the gate driving unit 20 and data driving unit 30, respectively.
The gate driving unit 20 applies the gate-on voltage (VGH) and gate-off voltage (VGL) to the gate line (GL), respectively, in correspondence to the gate control signal to turn on thin-film transistors on the same horizontal line for a period of time during which the gate-on voltage (VGH) is applied.
The data driving unit 30 applies a data voltage to the data line (DL) in correspondence to the data control signal, and the data voltage is applied to each pixel through the turned-on thin-film transistor (TFT).
At this time, a charge corresponding to the data voltage is charged to the liquid crystal capacitor (Clc). Furthermore, the storage capacitor (Cst) is charged along with the liquid crystal capacitor (Clc) to perform the role of reducing the voltage drop of the liquid crystal capacitor (Clc) due to a leakage current during the turn-off of the thin-film transistor (TFT).
The discharge circuit 60 senses the power-on/off state of the system, and accordingly supplies a discharge signal to the liquid crystal display panel 10, and to this end, the discharge circuit 60 is connected to an output end of the power supply unit 50 and the gate line (GL).
Here, the power-off state denotes a state that a plurality of voltages being output from the power supply unit 50 are not supplied and the potential is changed to a level of the ground voltage after a predetermined period of time has passed. More specifically, the discharge circuit 60 is not operated when the system is in a power-on state, and supplies a discharge signal generated by the gate-on voltage (VGH) supplied from the power supply unit 50 to the liquid crystal display panel 10 when in a power-off state. Furthermore, the discharge signal is supplied to the liquid crystal display panel 10 through the gate line (GL) to turn of the thin-film transistor (TFT).
Accordingly, charge stored in the liquid crystal capacitor (Clc) and storage capacitor (Cst) is discharged through the data line (DL) as a discharge path to more speedily remove residual images displayed on the liquid crystal display panel 10.
Most of residual charges are discharged through the data line (DL) in a power-off state. But some undischarged residual charges may be stored in a plurality of pixels, and the residual charges may also remain in the gate line (GL) and thin-film transistor (TFT) without being discharged due to the characteristics of the gate line (GL) and thin-film transistor (TFT) containing a capacitor component.
Therefore, when the liquid crystal display panel 10 is turned on, the residual charges may be discharged to the gate driving unit 20 through the gate line (GL). At this time, the residual charges flow to a level shifter of the gate driving unit 20. Meanwhile, the level shifter outputs a gate-off voltage (VGL) to the liquid crystal display panel 10 when turning on the liquid crystal display panel 10, and thus a current path connected from the level shifter to the gate-off voltage terminal is conducted. Accordingly, the residual charges are discharged to the gate-off voltage terminal through the level shifter. The residual charges are charged to a capacitor connected to the gate-off voltage terminal, and thus a potential difference between both capacitor ends is increased, thereby turning on a diode connected to the capacitor in parallel. At this time, the diode is connected to the ground terminal, and thus the residual charge is discharged in the direction of the diode to generate a leakage current.
The leakage current may create a short circuit on a path through which the gate-off voltage (VGL) is applied to the liquid crystal display panel 10. In this case, the potential of the gate-off voltage (VGL) is increased, and thus the thin-film transistor within the liquid crystal display panel 10 to which the gate-off voltage (VGL) is applied may enter an abnormal operation range. As a result, each pixel of the liquid crystal display panel 10 may not be driven in a proper manner, thereby causing screen display failure.